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author | Alexey Kardashevskiy | 2023-01-20 14:10:45 +1100 |
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committer | Borislav Petkov (AMD) | 2023-01-31 20:09:26 +0100 |
commit | 7914695743d598b189d549f2f57af24aa5633705 (patch) | |
tree | 801a28c227627f0d97a408d65a0f195fa2648137 /.cocciconfig | |
parent | 8c19b6f257fa71ed3a7a9df6ce466c6be31ca04c (diff) |
x86/amd: Cache debug register values in percpu variables
Reading DR[0-3]_ADDR_MASK MSRs takes about 250 cycles which is going to
be noticeable with the AMD KVM SEV-ES DebugSwap feature enabled. KVM is
going to store host's DR[0-3] and DR[0-3]_ADDR_MASK before switching to
a guest; the hardware is going to swap these on VMRUN and VMEXIT.
Store MSR values passed to set_dr_addr_mask() in percpu variables
(when changed) and return them via new amd_get_dr_addr_mask().
The gain here is about 10x.
As set_dr_addr_mask() uses the array too, change the @dr type to
unsigned to avoid checking for <0. And give it the amd_ prefix to match
the new helper as the whole DR_ADDR_MASK feature is AMD-specific anyway.
While at it, replace deprecated boot_cpu_has() with cpu_feature_enabled()
in set_dr_addr_mask().
Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20230120031047.628097-2-aik@amd.com
Diffstat (limited to '.cocciconfig')
0 files changed, 0 insertions, 0 deletions