diff options
| author | Paul Burton | 2017-08-18 14:04:35 -0700 |
|---|---|---|
| committer | Ralf Baechle | 2017-09-04 13:53:15 +0200 |
| commit | 07df8bfef8ce9536f93c957488a48d9d87d575c2 (patch) | |
| tree | dbbdcb76c0861702d42c56000aa86bb006ff0c6e | |
| parent | b2b2e584ceabeddbc5ea1965ca6ca435726f5de0 (diff) | |
irqchip: mips-gic: Use cpumask_first_and() in gic_set_affinity()
Currently in gic_set_affinity() we calculate a temporary cpumask holding
the intersection of the provided cpumask & the CPUs that are online,
then we call cpumask_first twice on it to find the first such CPU. Since
we don't need the temporary cpumask for anything else & we only care
about the first CPU that's both online & in the provided cpumask, we can
instead use cpumask_first_and to find that CPU & drop the temporary
mask.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17110/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | drivers/irqchip/irq-mips-gic.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c index 183c225b84de..8f64ac824d20 100644 --- a/drivers/irqchip/irq-mips-gic.c +++ b/drivers/irqchip/irq-mips-gic.c @@ -250,23 +250,23 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask, bool force) { unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq); - cpumask_t tmp = CPU_MASK_NONE; - unsigned long flags; + unsigned long flags; + unsigned int cpu; - cpumask_and(&tmp, cpumask, cpu_online_mask); - if (cpumask_empty(&tmp)) + cpu = cpumask_first_and(cpumask, cpu_online_mask); + if (cpu >= NR_CPUS) return -EINVAL; /* Assumption : cpumask refers to a single CPU */ spin_lock_irqsave(&gic_lock, flags); /* Re-route this IRQ */ - write_gic_map_vp(irq, BIT(mips_cm_vp_id(cpumask_first(&tmp)))); + write_gic_map_vp(irq, BIT(mips_cm_vp_id(cpu))); /* Update the pcpu_masks */ gic_clear_pcpu_masks(irq); if (read_gic_mask(irq)) - set_bit(irq, per_cpu_ptr(pcpu_masks, cpumask_first(&tmp))); + set_bit(irq, per_cpu_ptr(pcpu_masks, cpu)); cpumask_copy(irq_data_get_affinity_mask(d), cpumask); spin_unlock_irqrestore(&gic_lock, flags); |