diff options
| author | Paul Cercueil | 2018-08-23 15:17:43 +0200 |
|---|---|---|
| committer | Stephen Boyd | 2018-10-16 15:19:43 -0700 |
| commit | 2fdecde7752be5696c0ae301a0d1b1884081a0f1 (patch) | |
| tree | 3d01168bf1c3705716c36686391e299260f864e1 | |
| parent | 067b6dedeb34ffda811ebbadf8bbad9311f28dc4 (diff) | |
dt-bindings: clock: Add jz4725b-cgu.h header
This will be used from the devicetree bindings to specify the clocks
that should be obtained from the jz4725b-cgu driver.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| -rw-r--r-- | include/dt-bindings/clock/jz4725b-cgu.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/jz4725b-cgu.h b/include/dt-bindings/clock/jz4725b-cgu.h new file mode 100644 index 000000000000..460bbeff6ab8 --- /dev/null +++ b/include/dt-bindings/clock/jz4725b-cgu.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides clock numbers for the ingenic,jz4725b-cgu DT binding. + */ + +#ifndef __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ +#define __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ + +#define JZ4725B_CLK_EXT 0 +#define JZ4725B_CLK_OSC32K 1 +#define JZ4725B_CLK_PLL 2 +#define JZ4725B_CLK_PLL_HALF 3 +#define JZ4725B_CLK_CCLK 4 +#define JZ4725B_CLK_HCLK 5 +#define JZ4725B_CLK_PCLK 6 +#define JZ4725B_CLK_MCLK 7 +#define JZ4725B_CLK_IPU 8 +#define JZ4725B_CLK_LCD 9 +#define JZ4725B_CLK_I2S 10 +#define JZ4725B_CLK_SPI 11 +#define JZ4725B_CLK_MMC_MUX 12 +#define JZ4725B_CLK_UDC 13 +#define JZ4725B_CLK_UART 14 +#define JZ4725B_CLK_DMA 15 +#define JZ4725B_CLK_ADC 16 +#define JZ4725B_CLK_I2C 17 +#define JZ4725B_CLK_AIC 18 +#define JZ4725B_CLK_MMC0 19 +#define JZ4725B_CLK_MMC1 20 +#define JZ4725B_CLK_BCH 21 +#define JZ4725B_CLK_TCU 22 +#define JZ4725B_CLK_EXT512 23 +#define JZ4725B_CLK_RTC 24 + +#endif /* __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ */ |