diff options
| author | Kunihiko Hayashi | 2018-03-23 14:12:34 +0900 |
|---|---|---|
| committer | Philipp Zabel | 2018-03-27 10:44:04 +0200 |
| commit | 5573fe85c7e6f94613a357bfcbcec2b57492a8ed (patch) | |
| tree | 9c25e199aa065d96bd094a3258a0291bf9beb8a5 | |
| parent | 197858b68532d415f21a5a92fb6661c67c6c9a97 (diff) | |
reset: uniphier: add ethernet reset control support for PXs3
Add reset lines for ethernet controller on PXs3 SoC.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| -rw-r--r-- | drivers/reset/reset-uniphier.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index 0fa23129d343..360e06b20c53 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -124,6 +124,8 @@ static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = { static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = { UNIPHIER_RESETX(2, 0x200c, 0), /* NAND */ UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */ + UNIPHIER_RESETX(6, 0x200c, 9), /* Ether0 */ + UNIPHIER_RESETX(7, 0x200c, 10), /* Ether1 */ UNIPHIER_RESETX(8, 0x200c, 12), /* STDMAC */ UNIPHIER_RESETX(12, 0x200c, 4), /* USB30 link (GIO0) */ UNIPHIER_RESETX(13, 0x200c, 5), /* USB31 link (GIO1) */ |