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author | Clark Wang | 2020-07-27 11:15:13 +0800 |
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committer | Mark Brown | 2020-07-29 14:51:13 +0100 |
commit | 7ac9bbf6ab3085c2be21c90faf111930b8bdb5b2 (patch) | |
tree | e91a5f4155e631fc8cbfb36cbdb9bf55ed6fc890 | |
parent | 4294e4accf8d695ea5605f6b189008b692e3e82c (diff) |
dt-bindings: lpspi: New property in document DT bindings for LPSPI
Add "fsl,spi-only-use-cs1-sel" to fit i.MX8DXL-EVK.
Spi common code does not support use of CS signals discontinuously.
It only uses CS1 without using CS0. So, add this property to re-config
chipselect value.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Link: https://lore.kernel.org/r/20200727031513.31774-1-xiaoning.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml index 143b94a1883a..22882e769e26 100644 --- a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml +++ b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml @@ -34,6 +34,12 @@ properties: - const: per - const: ipg + fsl,spi-only-use-cs1-sel: + description: + spi common code does not support use of CS signals discontinuously. + i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add + this property to re-config the chipselect value in the LPSPI driver. + required: - compatible - reg @@ -57,4 +63,5 @@ examples: <&clks IMX7ULP_CLK_DUMMY>; clock-names = "per", "ipg"; spi-slave; + fsl,spi-only-use-cs1-sel; }; |