diff options
author | Ben Skeggs | 2020-06-21 12:16:24 +1000 |
---|---|---|
committer | Ben Skeggs | 2020-07-24 18:51:02 +1000 |
commit | 916722fce5a25a1ffefac616f8f0213de9ce0353 (patch) | |
tree | dae85f5ee962dadf3c9728fb891c7d6ba9a7980c | |
parent | ed0b86a90bf91d0c41f6b373befd2ce98658b49e (diff) |
drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_curs_clr()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
-rw-r--r-- | drivers/gpu/drm/nouveau/dispnv50/head507d.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/dispnv50/head827d.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/dispnv50/head907d.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/dispnv50/headc37d.c | 7 |
4 files changed, 21 insertions, 7 deletions
diff --git a/drivers/gpu/drm/nouveau/dispnv50/head507d.c b/drivers/gpu/drm/nouveau/dispnv50/head507d.c index 473119804b5b..de6ab797e7fd 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/head507d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head507d.c @@ -123,7 +123,10 @@ head507d_curs_clr(struct nv50_head *head) if ((ret = PUSH_WAIT(push, 2))) return ret; - PUSH_NVSQ(push, NV507D, 0x0880 + (i * 0x400), 0x05000000); + PUSH_MTHD(push, NV507D, HEAD_SET_CONTROL_CURSOR(i), + NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | + NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8) | + NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64)); return 0; } diff --git a/drivers/gpu/drm/nouveau/dispnv50/head827d.c b/drivers/gpu/drm/nouveau/dispnv50/head827d.c index 0dc04774d3d2..194d1771c481 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/head827d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head827d.c @@ -36,8 +36,12 @@ head827d_curs_clr(struct nv50_head *head) if ((ret = PUSH_WAIT(push, 4))) return ret; - PUSH_NVSQ(push, NV827D, 0x0880 + (i * 0x400), 0x05000000); - PUSH_NVSQ(push, NV827D, 0x089c + (i * 0x400), 0x00000000); + PUSH_MTHD(push, NV827D, HEAD_SET_CONTROL_CURSOR(i), + NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | + NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8) | + NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64)); + + PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_CURSOR(i), 0x00000000); return 0; } diff --git a/drivers/gpu/drm/nouveau/dispnv50/head907d.c b/drivers/gpu/drm/nouveau/dispnv50/head907d.c index aca4da6c2eea..3683d940f6cc 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/head907d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head907d.c @@ -151,8 +151,12 @@ head907d_curs_clr(struct nv50_head *head) if ((ret = PUSH_WAIT(push, 4))) return ret; - PUSH_NVSQ(push, NV907D, 0x0480 + (i * 0x300), 0x05000000); - PUSH_NVSQ(push, NV907D, 0x048c + (i * 0x300), 0x00000000); + PUSH_MTHD(push, NV907D, HEAD_SET_CONTROL_CURSOR(i), + NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | + NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8) | + NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64)); + + PUSH_MTHD(push, NV907D, HEAD_SET_CONTEXT_DMA_CURSOR(i), 0x00000000); return 0; } diff --git a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c index a9ede937222d..48b8b4dbd693 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c @@ -101,8 +101,11 @@ headc37d_curs_clr(struct nv50_head *head) if ((ret = PUSH_WAIT(push, 4))) return ret; - PUSH_NVSQ(push, NVC37D, 0x209c + (i * 0x400), 0x000000cf); - PUSH_NVSQ(push, NVC37D, 0x2088 + (i * 0x400), 0x00000000); + PUSH_MTHD(push, NVC37D, HEAD_SET_CONTROL_CURSOR(i), + NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) | + NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8)); + + PUSH_MTHD(push, NVC37D, HEAD_SET_CONTEXT_DMA_CURSOR(i, 0), 0x00000000); return 0; } |