diff options
author | Vinicius Costa Gomes | 2019-12-02 15:19:53 -0800 |
---|---|---|
committer | Jeff Kirsher | 2020-01-06 15:02:45 -0800 |
commit | a299df3524eabc1def8e93bf005b07ea396ff2bd (patch) | |
tree | b8f927ed92a125dfd4c3d1b5845175ccc4976419 | |
parent | 60dbede0c4f3d7b1a1f56d1f91bbca3c5a73f7f5 (diff) |
igc: Use Start of Packet signal from PHY for timestamping
For better accuracy, i225 is able to do timestamping using the Start of
Packet signal from the PHY.
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
-rw-r--r-- | drivers/net/ethernet/intel/igc/igc_defines.h | 2 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/igc/igc_ptp.c | 5 |
2 files changed, 6 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 586fa14098eb..2121fc34e300 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -395,6 +395,7 @@ #define IGC_TSYNCRXCTL_TYPE_EVENT_V2 0x0A #define IGC_TSYNCRXCTL_ENABLED 0x00000010 /* enable Rx timestamping */ #define IGC_TSYNCRXCTL_SYSCFI 0x00000020 /* Sys clock frequency */ +#define IGC_TSYNCRXCTL_RXSYNSIG 0x00000400 /* Sample RX tstamp in PHY sop */ /* Time Sync Receive Configuration */ #define IGC_TSYNCRXCFG_PTP_V1_CTRLT_MASK 0x000000FF @@ -418,6 +419,7 @@ #define IGC_TSYNCTXCTL_SYNC_COMP_ERR 0x20000000 /* sync err */ #define IGC_TSYNCTXCTL_SYNC_COMP 0x40000000 /* sync complete */ #define IGC_TSYNCTXCTL_START_SYNC 0x80000000 /* initiate sync */ +#define IGC_TSYNCTXCTL_TXSYNSIG 0x00000020 /* Sample TX tstamp in PHY sop */ /* Receive Checksum Control */ #define IGC_RXCSUM_CRCOFL 0x00000800 /* CRC32 offload enable */ diff --git a/drivers/net/ethernet/intel/igc/igc_ptp.c b/drivers/net/ethernet/intel/igc/igc_ptp.c index 79ffb833aa80..693506587198 100644 --- a/drivers/net/ethernet/intel/igc/igc_ptp.c +++ b/drivers/net/ethernet/intel/igc/igc_ptp.c @@ -368,6 +368,7 @@ static int igc_ptp_set_timestamp_mode(struct igc_adapter *adapter, if (tsync_rx_ctl) { tsync_rx_ctl = IGC_TSYNCRXCTL_ENABLED; tsync_rx_ctl |= IGC_TSYNCRXCTL_TYPE_ALL; + tsync_rx_ctl |= IGC_TSYNCRXCTL_RXSYNSIG; config->rx_filter = HWTSTAMP_FILTER_ALL; is_l2 = true; is_l4 = true; @@ -384,8 +385,10 @@ static int igc_ptp_set_timestamp_mode(struct igc_adapter *adapter, } } - if (tsync_tx_ctl) + if (tsync_tx_ctl) { tsync_tx_ctl = IGC_TSYNCTXCTL_ENABLED; + tsync_tx_ctl |= IGC_TSYNCTXCTL_TXSYNSIG; + } /* enable/disable TX */ regval = rd32(IGC_TSYNCTXCTL); |