diff options
author | Aaron Wu | 2014-10-22 13:45:58 +0800 |
---|---|---|
committer | Steven Miao | 2015-04-23 21:34:32 +0800 |
commit | ef7dcaf1e7bbf7adaaf45cac1c1d208929fb25e5 (patch) | |
tree | da1b1bfd00bcffd8628ca34082d227e81f43dafa | |
parent | bb717b33aa6b01abcc78c7a18dec343a3bde9574 (diff) |
pm: sometimes wake up from suspend to RAM would fail
Sometimes it fails to wake up from suspend to RAM, this is because
we would flush the data cache by assemble command FLUSHINV before
suspend to RAM, and there is a delay between this command execution
and cache flush completion. Add a 1uS delay to works around this.
Signed-off-by: Aaron Wu <Aaron.wu@analog.com>
-rw-r--r-- | arch/blackfin/mach-common/pm.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c index 1387a94bcfd5..a66d979ec651 100644 --- a/arch/blackfin/mach-common/pm.c +++ b/arch/blackfin/mach-common/pm.c @@ -14,6 +14,7 @@ #include <linux/slab.h> #include <linux/io.h> #include <linux/irq.h> +#include <linux/delay.h> #include <asm/cplb.h> #include <asm/gpio.h> @@ -180,6 +181,7 @@ int bfin_pm_suspend_mem_enter(void) #if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK) flushinv_all_dcache(); + udelay(1); #endif _disable_dcplb(); _disable_icplb(); |