diff options
author | Ezequiel Garcia | 2013-11-07 12:17:17 -0300 |
---|---|---|
committer | Brian Norris | 2014-01-03 11:22:11 -0800 |
commit | 0a3f3a1916bcac44a86ca89c874cdcad5e7746e9 (patch) | |
tree | 9e2b85577b502767bb3908fececd9a614649145f | |
parent | 2128b08c7c3aaf8b81fb76a0ce9ba37b5492f0db (diff) |
mtd: nand: pxa3xx: Replace host->page_size by mtd->writesize
There's no need to privately store the device page size as it's
available in mtd structure field mtd->writesize.
Also, this removes the hardcoded page size value, leaving the
auto-detected value only.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-rw-r--r-- | drivers/mtd/nand/pxa3xx_nand.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index d6e96210c251..3779b70623a0 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -151,7 +151,6 @@ struct pxa3xx_nand_host { void *info_data; /* page size of attached chip */ - unsigned int page_size; int use_ecc; int cs; @@ -610,12 +609,12 @@ static int prepare_command_pool(struct pxa3xx_nand_info *info, int command, info->buf_start += mtd->writesize; /* Second command setting for large pages */ - if (host->page_size >= PAGE_CHUNK_SIZE) + if (mtd->writesize >= PAGE_CHUNK_SIZE) info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8); case NAND_CMD_SEQIN: /* small page addr setting */ - if (unlikely(host->page_size < PAGE_CHUNK_SIZE)) { + if (unlikely(mtd->writesize < PAGE_CHUNK_SIZE)) { info->ndcb1 = ((page_addr & 0xFFFFFF) << 8) | (column & 0xFF); @@ -891,7 +890,6 @@ static int pxa3xx_nand_config_flash(struct pxa3xx_nand_info *info, } /* calculate flash information */ - host->page_size = f->page_size; host->read_id_bytes = (f->page_size == 2048) ? 4 : 2; /* calculate addressing information */ @@ -930,11 +928,9 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info) if (ndcr & NDCR_PAGE_SZ) { /* Controller's FIFO size */ info->fifo_size = 2048; - host->page_size = 2048; host->read_id_bytes = 4; } else { info->fifo_size = 512; - host->page_size = 512; host->read_id_bytes = 2; } @@ -1102,7 +1098,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd) def = pxa3xx_flash_ids; KEEP_CONFIG: chip->ecc.mode = NAND_ECC_HW; - chip->ecc.size = host->page_size; + chip->ecc.size = info->fifo_size; chip->ecc.strength = 1; if (info->reg_ndcr & NDCR_DWIDTH_M) |