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authorXiaolei Li2017-06-23 15:12:24 +0800
committerBoris Brezillon2017-06-25 16:54:01 +0200
commit188986c70e09f0f3cd88e6fe14c89e439474e3ec (patch)
treeb8b196fa607d59e9fe9a5571f5f0357e1e6c49b6
parenta57ce439505da3801e264656a3bdf746505c77ec (diff)
mtd: nand: mtk: fix incorrect register setting order about ecc irq
Currently, we trigger ECC HW before setting ecc irq. It is incorrect. Because ECC starts working once the register ECC_CTL_REG is set as ECC_OP_ENABLE. And this may lead an abnormal behavior of ecc irq. So, should enable ecc irq at first, then trigger ECC. Fixes: 1d6b1e464950 ("mtd: mediatek: driver for MTK Smart Device") Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
-rw-r--r--drivers/mtd/nand/mtk_ecc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mtd/nand/mtk_ecc.c b/drivers/mtd/nand/mtk_ecc.c
index 4958121cb827..a855a4e5cc35 100644
--- a/drivers/mtd/nand/mtk_ecc.c
+++ b/drivers/mtd/nand/mtk_ecc.c
@@ -276,8 +276,6 @@ int mtk_ecc_enable(struct mtk_ecc *ecc, struct mtk_ecc_config *config)
if (ret)
return ret;
- writew(ECC_OP_ENABLE, ecc->regs + ECC_CTL_REG(op));
-
init_completion(&ecc->done);
reg_val = ECC_IRQ_EN;
/*
@@ -289,6 +287,8 @@ int mtk_ecc_enable(struct mtk_ecc *ecc, struct mtk_ecc_config *config)
reg_val |= ECC_PG_IRQ_SEL;
writew(reg_val, ecc->regs + ECC_IRQ_REG(op));
+ writew(ECC_OP_ENABLE, ecc->regs + ECC_CTL_REG(op));
+
return 0;
}
EXPORT_SYMBOL(mtk_ecc_enable);