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authorMaarten Brock2019-11-25 18:45:31 +0530
committerGreg Kroah-Hartman2020-01-14 14:34:04 +0100
commit1d3c2ea44b1163269062c891d073f4764686028a (patch)
tree340eb1479ca149bbde38413748480e3b2d3df6b4
parent6d8bf787a6ad04442307088e1a5352ee448cab45 (diff)
serial: xilinx_uartps: set_mctrl sets RTS and DTR
set_mctrl now sets RTS and DTR. Signed-off-by: Maarten Brock <m.brock@vanmierlo.com> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Link: https://lore.kernel.org/r/1574687731-21563-3-git-send-email-shubhrajyoti.datta@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/tty/serial/xilinx_uartps.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
index 958c3b4712fb..98db9dc168ff 100644
--- a/drivers/tty/serial/xilinx_uartps.c
+++ b/drivers/tty/serial/xilinx_uartps.c
@@ -1055,6 +1055,10 @@ static void cdns_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
val &= ~(CDNS_UART_MODEMCR_RTS | CDNS_UART_MODEMCR_DTR);
mode_reg &= ~CDNS_UART_MR_CHMODE_MASK;
+ if (mctrl & TIOCM_RTS)
+ val |= CDNS_UART_MODEMCR_RTS;
+ if (mctrl & TIOCM_DTR)
+ val |= CDNS_UART_MODEMCR_DTR;
if (mctrl & TIOCM_LOOP)
mode_reg |= CDNS_UART_MR_CHMODE_L_LOOP;
else