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authorShawn Guo2014-07-18 16:09:07 +0800
committerShawn Guo2014-07-18 16:09:07 +0800
commit1fd6a911c13b9477f72e07611f33d00dc300eea5 (patch)
tree4660c9a1092a479dcfffb5099abe39023b376b01
parent4c834452aad01531db949414f94f817a86348d59 (diff)
parent03e97220b99b8b691ea5b130b7b4c135c9662792 (diff)
Merge tag 'imx-fixes-3.16-2' into imx/soc
The i.MX fixes for 3.16, 2nd take: It fixes a hard machine hang regression for boards where only pcie is active but no sata, as the latest imx6-pcie driver is no longer enabling the upstream clock directly but only lvds clk out.
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 8e795dea02ec..8556c787e59c 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -70,7 +70,7 @@ static const char *cko_sels[] = { "cko1", "cko2", };
static const char *lvds_sels[] = {
"dummy", "dummy", "dummy", "dummy", "dummy", "dummy",
"pll4_audio", "pll5_video", "pll8_mlb", "enet_ref",
- "pcie_ref", "sata_ref",
+ "pcie_ref_125m", "sata_ref_100m",
};
enum mx6q_clks {
@@ -491,7 +491,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
/* All existing boards with PCIe use LVDS1 */
if (IS_ENABLED(CONFIG_PCI_IMX6))
- clk_set_parent(clk[lvds1_sel], clk[sata_ref]);
+ clk_set_parent(clk[lvds1_sel], clk[sata_ref_100m]);
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);