aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJay Fang2021-03-04 18:47:52 +0800
committerMark Brown2021-03-10 12:47:01 +0000
commit31890269c0a031e704f995bbd39e1fd77a381207 (patch)
tree18c6f62a4156825dbed332329c9966cc41851c12
parent2c94b1b7dda187f654f925f32985d9121431730e (diff)
spi: cadence-quadspi: Silence shiftTooManyBitsSigned warning
drivers/spi/spi-cadence-quadspi.c:267:18: warning: Shifting signed 32-bit value by 31 bits is undefined behaviour [shiftTooManyBitsSigned] return reg & (1 << CQSPI_REG_CONFIG_IDLE_LSB); ^ Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Jay Fang <f.fangjian@huawei.com> Link: https://lore.kernel.org/r/1614854872-8694-1-git-send-email-f.fangjian@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--drivers/spi/spi-cadence-quadspi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 14a712058fac..e2d6ea833423 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -264,7 +264,7 @@ static bool cqspi_is_idle(struct cqspi_st *cqspi)
{
u32 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
- return reg & (1 << CQSPI_REG_CONFIG_IDLE_LSB);
+ return reg & (1UL << CQSPI_REG_CONFIG_IDLE_LSB);
}
static u32 cqspi_get_rd_sram_level(struct cqspi_st *cqspi)