diff options
author | Thomas Bogendoerfer | 2019-11-19 12:08:57 +0100 |
---|---|---|
committer | Paul Burton | 2019-11-22 10:56:16 -0800 |
commit | 37640adbefd66491cb8083a438f7bf366ac09bc7 (patch) | |
tree | e60a6a48fc3dba21db80d4c41a34e6c880591e77 | |
parent | e3d765a941f6130fd94e47b2064cfee71f4cbadd (diff) |
MIPS: PCI: remember nasid changed by set interrupt affinity
When changing interrupt affinity remember the possible changed nasid,
otherwise an interrupt deactivate/activate sequence will incorrectly
setup interrupt.
Fixes: e6308b6d35ea ("MIPS: SGI-IP27: abstract chipset irq from bridge")
Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
-rw-r--r-- | arch/mips/pci/pci-xtalk-bridge.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/mips/pci/pci-xtalk-bridge.c b/arch/mips/pci/pci-xtalk-bridge.c index 72e60df505f4..05753fad70bf 100644 --- a/arch/mips/pci/pci-xtalk-bridge.c +++ b/arch/mips/pci/pci-xtalk-bridge.c @@ -306,16 +306,15 @@ static int bridge_set_affinity(struct irq_data *d, const struct cpumask *mask, struct bridge_irq_chip_data *data = d->chip_data; int bit = d->parent_data->hwirq; int pin = d->hwirq; - nasid_t nasid; int ret, cpu; ret = irq_chip_set_affinity_parent(d, mask, force); if (ret >= 0) { cpu = cpumask_first_and(mask, cpu_online_mask); - nasid = cpu_to_node(cpu); + data->nasid = cpu_to_node(cpu); bridge_write(data->bc, b_int_addr[pin].addr, (((data->bc->intr_addr >> 30) & 0x30000) | - bit | (nasid << 8))); + bit | (data->nasid << 8))); bridge_read(data->bc, b_wid_tflush); } return ret; |