diff options
| author | Jonathan Cameron | 2022-05-08 18:56:46 +0100 |
|---|---|---|
| committer | Jonathan Cameron | 2022-06-14 11:53:17 +0100 |
| commit | 389b8972eb2a614cb3189e5fa55b1b7f66142c71 (patch) | |
| tree | ba493e497718176fd1524c2d07417007d0e0bc3b | |
| parent | 8ff2eb625c353b1491d9f89f1dfd52e7aef5734c (diff) | |
iio: frequency: adf4350: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Updated help text to 'may' require buffers to be in their own cacheline.
Fixes: e31166f0fd48 ("iio: frequency: New driver for Analog Devices ADF4350/ADF4351 Wideband Synthesizers")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-67-jic23@kernel.org
| -rw-r--r-- | drivers/iio/frequency/adf4350.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/iio/frequency/adf4350.c b/drivers/iio/frequency/adf4350.c index be1218d86291..85e289700c3c 100644 --- a/drivers/iio/frequency/adf4350.c +++ b/drivers/iio/frequency/adf4350.c @@ -56,10 +56,10 @@ struct adf4350_state { */ struct mutex lock; /* - * DMA (thus cache coherency maintenance) requires the - * transfer buffers to live in their own cache lines. + * DMA (thus cache coherency maintenance) may require that + * transfer buffers live in their own cache lines. */ - __be32 val ____cacheline_aligned; + __be32 val __aligned(IIO_DMA_MINALIGN); }; static struct adf4350_platform_data default_pdata = { |