diff options
| author | Kenneth Graunke | 2014-01-21 14:42:38 -0800 |
|---|---|---|
| committer | Daniel Vetter | 2014-01-22 10:48:09 +0100 |
| commit | 431810112123bb26a0be39a99835861de9906abc (patch) | |
| tree | fd28b62c4b7ff3a52e5035eabfc3e654359a1583 | |
| parent | 74e21ac2ccdc5e8f310d536ffe66d22571ece5c5 (diff) | |
drm/i915: Allow reading the TIMESTAMP register on Gen8.
Nothing's changed here; we just need to bump the generation check.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_uncore.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 2c8143c37de3..87df68f5f504 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -805,7 +805,7 @@ static const struct register_whitelist { uint32_t size; uint32_t gen_bitmask; /* support gens, 0x10 for 4, 0x30 for 4 and 5, etc. */ } whitelist[] = { - { RING_TIMESTAMP(RENDER_RING_BASE), 8, 0xF0 }, + { RING_TIMESTAMP(RENDER_RING_BASE), 8, 0x1F0 }, }; int i915_reg_read_ioctl(struct drm_device *dev, |