diff options
| author | Stefan Brüns | 2017-10-17 01:06:34 +0200 |
|---|---|---|
| committer | Vinod Koul | 2017-10-23 11:44:03 +0530 |
| commit | 464aa6f54b093df1ccaff6558207f8bf68a69c37 (patch) | |
| tree | 5e85763517793b83e2e0ea1edf533d2ec745e76b | |
| parent | 12e0177055ee4b5ab656414b32054e64568160d8 (diff) | |
dmaengine: sun6i: Retrieve channel count/max request from devicetree
To avoid introduction of a new compatible for each small SoC/DMA controller
variation, move the definition of the channel count to the devicetree.
The number of vchans is no longer explicit, but limited by the highest
port/DMA request number. The result is a slight overallocation for SoCs
with a sparse port mapping.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| -rw-r--r-- | drivers/dma/sun6i-dma.c | 27 |
1 files changed, 26 insertions, 1 deletions
diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 0cabb48b0fb5..0cd13f17fc11 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -42,6 +42,9 @@ #define DMA_STAT 0x30 +/* Offset between DMA_IRQ_EN and DMA_IRQ_STAT limits number of channels */ +#define DMA_MAX_CHANNELS (DMA_IRQ_CHAN_NR * 0x10 / 4) + /* * sun8i specific registers */ @@ -65,7 +68,8 @@ #define DMA_CHAN_LLI_ADDR 0x08 #define DMA_CHAN_CUR_CFG 0x0c -#define DMA_CHAN_CFG_SRC_DRQ(x) ((x) & 0x1f) +#define DMA_CHAN_MAX_DRQ 0x1f +#define DMA_CHAN_CFG_SRC_DRQ(x) ((x) & DMA_CHAN_MAX_DRQ) #define DMA_CHAN_CFG_SRC_IO_MODE BIT(5) #define DMA_CHAN_CFG_SRC_LINEAR_MODE (0 << 5) #define DMA_CHAN_CFG_SRC_BURST_A31(x) (((x) & 0x3) << 7) @@ -1174,6 +1178,7 @@ MODULE_DEVICE_TABLE(of, sun6i_dma_match); static int sun6i_dma_probe(struct platform_device *pdev) { + struct device_node *np = pdev->dev.of_node; struct sun6i_dma_dev *sdc; struct resource *res; int ret, i; @@ -1248,6 +1253,26 @@ static int sun6i_dma_probe(struct platform_device *pdev) sdc->num_vchans = sdc->cfg->nr_max_vchans; sdc->max_request = sdc->cfg->nr_max_requests; + ret = of_property_read_u32(np, "dma-channels", &sdc->num_pchans); + if (ret && !sdc->num_pchans) { + dev_err(&pdev->dev, "Can't get dma-channels.\n"); + return ret; + } + + ret = of_property_read_u32(np, "dma-requests", &sdc->max_request); + if (ret && !sdc->max_request) { + dev_info(&pdev->dev, "Missing dma-requests, using %u.\n", + DMA_CHAN_MAX_DRQ); + sdc->max_request = DMA_CHAN_MAX_DRQ; + } + + /* + * If the number of vchans is not specified, derive it from the + * highest port number, at most one channel per port and direction. + */ + if (!sdc->num_vchans) + sdc->num_vchans = 2 * (sdc->max_request + 1); + sdc->pchans = devm_kcalloc(&pdev->dev, sdc->num_pchans, sizeof(struct sun6i_pchan), GFP_KERNEL); if (!sdc->pchans) |