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authorEugeni Dodonov2012-03-29 12:32:31 -0300
committerDaniel Vetter2012-04-09 18:04:02 +0200
commit52f025efa989318a6bc634103d70ca7a51a8b52d (patch)
treea06a8f3fdb094a93327752edb0d69c93a365b8ac
parent7501a4d846c9ca3d448f0eee102ebc409d9c1b19 (diff)
drm/i915: add PIXCLK_GATE register
Pixel clock gating control for Lynx point. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 542128c80546..a9a47f6ef7d1 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4128,4 +4128,10 @@
#define SBI_RESPONSE_SUCCESS (0x0<<1)
#define SBI_BUSY (0x1<<0)
#define SBI_READY (0x0<<0)
+
+/* LPT PIXCLK_GATE */
+#define PIXCLK_GATE 0xC6020
+#define PIXCLK_GATE_UNGATE 1<<0
+#define PIXCLK_GATE_GATE 0<<0
+
#endif /* _I915_REG_H_ */