diff options
| author | Biju Das | 2019-09-23 15:41:28 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven | 2019-10-07 14:29:53 +0200 |
| commit | 56278c8fcb71874d591907d654272d511ce3597c (patch) | |
| tree | f96c0f1c31a551b88aad7040c18aa2a489c72ee1 | |
| parent | 0b9f1c2c2fd4481990515a2918297a50a23a3b34 (diff) | |
clk: renesas: r8a774b1: Add TMU clock
This patch adds the TMU clocks to the R8A774B1 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569249688-15821-1-git-send-email-biju.das@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | drivers/clk/renesas/r8a774b1-cpg-mssr.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a774b1-cpg-mssr.c b/drivers/clk/renesas/r8a774b1-cpg-mssr.c index 6cad6ba4a682..c9af70917312 100644 --- a/drivers/clk/renesas/r8a774b1-cpg-mssr.c +++ b/drivers/clk/renesas/r8a774b1-cpg-mssr.c @@ -110,6 +110,11 @@ static const struct cpg_core_clk r8a774b1_core_clks[] __initconst = { }; static const struct mssr_mod_clk r8a774b1_mod_clks[] __initconst = { + DEF_MOD("tmu4", 121, R8A774B1_CLK_S0D6), + DEF_MOD("tmu3", 122, R8A774B1_CLK_S3D2), + DEF_MOD("tmu2", 123, R8A774B1_CLK_S3D2), + DEF_MOD("tmu1", 124, R8A774B1_CLK_S3D2), + DEF_MOD("tmu0", 125, R8A774B1_CLK_CP), DEF_MOD("fdp1-0", 119, R8A774B1_CLK_S0D1), DEF_MOD("scif5", 202, R8A774B1_CLK_S3D4), DEF_MOD("scif4", 203, R8A774B1_CLK_S3D4), |