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authorBrian Masney2019-02-07 21:16:29 -0500
committerLinus Walleij2019-02-13 09:33:55 +0100
commit582648f5ef14383c66b26834b9a98ade8b4da74c (patch)
tree4095e8f062e15a8486eb1076750750f213849aa7
parenta796fab2c605d6340512c51c6c3fa1c581357993 (diff)
arm: dts: qcom: mdm9615: add interrupt controller properties
Add interrupt controller properties now that ssbi-gpio is a proper hierarchical IRQ chip. The interrupts property is no longer needed so remove it. Note that the IRQs started at 24 instead of 192 like all of the other PMICs. This is the same IRQs as the MPP for this board. qcom-pm8xxx.c doesn't set the shared IRQs so this is highly likely to be a copy and paste error. Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--arch/arm/boot/dts/qcom-mdm9615.dtsi9
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi
index c852b69229c9..0ed6fc3e873c 100644
--- a/arch/arm/boot/dts/qcom-mdm9615.dtsi
+++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi
@@ -323,13 +323,8 @@
pmicgpio: gpio@150 {
compatible = "qcom,pm8018-gpio", "qcom,ssbi-gpio";
- interrupt-parent = <&pmicintc>;
- interrupts = <24 IRQ_TYPE_NONE>,
- <25 IRQ_TYPE_NONE>,
- <26 IRQ_TYPE_NONE>,
- <27 IRQ_TYPE_NONE>,
- <28 IRQ_TYPE_NONE>,
- <29 IRQ_TYPE_NONE>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
};