diff options
| author | Sascha Hauer | 2013-04-04 11:25:08 +0200 |
|---|---|---|
| committer | Shawn Guo | 2013-04-12 19:28:15 +0800 |
| commit | 5d530bb0ad84d403d1aac79a8a8acf2c2b0a8dd7 (patch) | |
| tree | 1d3529a76ca9dc9bf5250fd146ebbb64dcfbe963 | |
| parent | dc13ba2950acdd7ca64de3a8addcf85ada8ee908 (diff) | |
ARM: i.MX5: Add PATA and SRTC clocks
This adds the clock gates and the binding documentation
for PATA and SRTC.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/clock/imx5-clock.txt | 2 | ||||
| -rw-r--r-- | arch/arm/mach-imx/clk-imx51-imx53.c | 3 |
2 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx5-clock.txt b/Documentation/devicetree/bindings/clock/imx5-clock.txt index 838ab8801e93..84cae1f187ca 100644 --- a/Documentation/devicetree/bindings/clock/imx5-clock.txt +++ b/Documentation/devicetree/bindings/clock/imx5-clock.txt @@ -183,6 +183,8 @@ clocks and IDs. cko2_sel 168 cko2_podf 169 cko2 170 + srtc_gate 171 + pata_gate 172 Examples (for mx53): diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index a163e0e365dc..efbccc0dcada 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -110,6 +110,7 @@ enum imx5_clks { owire_gate, gpu3d_s, gpu2d_s, gpu3d_gate, gpu2d_gate, garb_gate, cko1_sel, cko1_podf, cko1, cko2_sel, cko2_podf, cko2, + srtc_gate, pata_gate, clk_max }; @@ -266,6 +267,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, clk[epit2_ipg_gate] = imx_clk_gate2("epit2_ipg_gate", "ipg", MXC_CCM_CCGR2, 6); clk[epit2_hf_gate] = imx_clk_gate2("epit2_hf_gate", "per_root", MXC_CCM_CCGR2, 8); clk[owire_gate] = imx_clk_gate2("owire_gate", "per_root", MXC_CCM_CCGR2, 22); + clk[srtc_gate] = imx_clk_gate2("srtc_gate", "per_root", MXC_CCM_CCGR4, 28); + clk[pata_gate] = imx_clk_gate2("pata_gate", "ipg", MXC_CCM_CCGR4, 0); for (i = 0; i < ARRAY_SIZE(clk); i++) if (IS_ERR(clk[i])) |