diff options
| author | Philip Rakity | 2011-07-11 14:47:54 -0700 |
|---|---|---|
| committer | Chris Ball | 2011-08-13 14:50:20 -0400 |
| commit | 606a15e475880157dd2336f2dc220eacc9eaf36b (patch) | |
| tree | f854d03493c194c2906f15f8087eec1733160b0b | |
| parent | 78869618a886d33d8cdfcb78cf9b245b5250e465 (diff) | |
mmc: sdhci: pxav3: controller needs 32 bit ADMA addressing
Enable the quirk.
(Best used in conjunction with patch downgrading ADMA to SDMA when
transfer is not aligned.)
Signed-off-by: Philip Rakity <prakity@marvell.com>
Acked-by: Zhangfei Gao <zhangfei.gao@marvell.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
| -rw-r--r-- | drivers/mmc/host/sdhci-pxav3.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c index 4198dbbc5c20..fc7e4a515629 100644 --- a/drivers/mmc/host/sdhci-pxav3.c +++ b/drivers/mmc/host/sdhci-pxav3.c @@ -195,7 +195,8 @@ static int __devinit sdhci_pxav3_probe(struct platform_device *pdev) clk_enable(clk); host->quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL - | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC; + | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC + | SDHCI_QUIRK_32BIT_ADMA_SIZE; /* enable 1/8V DDR capable */ host->mmc->caps |= MMC_CAP_1_8V_DDR; |