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authorPaul Cercueil2019-06-07 17:44:09 +0200
committerThierry Reding2019-06-26 11:39:05 +0200
commit6580fd173070a3a494d94b40d7ca5e5a815fe29a (patch)
tree2b0880eb21aa067eaeb001f303a1e399edbe6f37
parent1ac99c58bda9b911d6e47ed6d4d04a2b00ff703b (diff)
pwm: jz4740: Force TCU2 channels to return to their init level
When the PWM mode of TCU2 channels is disabled, their corresponding pin does not always return to its initial level. Force this by using a small trick: we set duty > period, which is an invalid configuration for the hardware, which then correctly resets the pin to the initial level. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
-rw-r--r--drivers/pwm/pwm-jz4740.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c
index e73ee72df09d..2e4ecc061dd2 100644
--- a/drivers/pwm/pwm-jz4740.c
+++ b/drivers/pwm/pwm-jz4740.c
@@ -72,7 +72,15 @@ static void jz4740_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
uint32_t ctrl = jz4740_timer_get_ctrl(pwm->hwpwm);
- /* Disable PWM output.
+ /*
+ * Set duty > period. This trick allows the TCU channels in TCU2 mode to
+ * properly return to their init level.
+ */
+ jz4740_timer_set_duty(pwm->hwpwm, 0xffff);
+ jz4740_timer_set_period(pwm->hwpwm, 0x0);
+
+ /*
+ * Disable PWM output.
* In TCU2 mode (channel 1/2 on JZ4750+), this must be done before the
* counter is stopped, while in TCU1 mode the order does not matter.
*/