diff options
| author | David Bauer | 2019-12-16 01:36:46 +0100 |
|---|---|---|
| committer | Tudor Ambarus | 2019-12-23 19:17:50 +0200 |
| commit | 707745e8d4e75b638b990d67950ab292b3b8ea2a (patch) | |
| tree | a69afb5cb7e128b6ff8d1effe8dbb778925aa3d2 | |
| parent | 307dd80885af7183696ab6d81d73afc7a5148df6 (diff) | |
mtd: spi-nor: Add support for mx25r3235f
Add MTD support for the Macronix MX25R3235F SPI NOR chip from Macronix.
The chip has 4MB of total capacity, divided into a total of 64 sectors,
each 64KB sized. The chip also supports 4KB large sectors.
Additionally, it supports dual and quad read modes.
Functionality was verified on an HPE/Aruba AP-303 board.
Signed-off-by: David Bauer <mail@david-bauer.net>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| -rw-r--r-- | drivers/mtd/spi-nor/spi-nor.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index e818fe405a48..addb6319fcbb 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -2456,6 +2456,8 @@ static const struct flash_info spi_nor_ids[] = { { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, + { "mx25r3235f", INFO(0xc22816, 0, 64 * 1024, 64, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "mx25u12835f", INFO(0xc22538, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, |