diff options
| author | Arnd Bergmann | 2022-07-21 14:59:23 +0200 |
|---|---|---|
| committer | Arnd Bergmann | 2022-07-21 14:59:24 +0200 |
| commit | 755d0ebc03f872c33b108534f23d82d2778c2793 (patch) | |
| tree | d1ce3b70d3aed53ac48e156c491f84d01f34d897 | |
| parent | 7e0b0cc16ba1ee0d3076bd5f06dee6fe88479092 (diff) | |
| parent | 3b5a7ca7d252b96e9623b262414713828b2bd68f (diff) | |
Merge tag 'at91-soc-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc
AT91 SoC for 5.20
It contains updates for integration with OP-TEE by having a
dummy outer_cache.write_sec function to avoid triggering
exception when Linux tries to update secure registers.
* tag 'at91-soc-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: at91: setup outer cache .write_sec() callback if needed
ARM: at91: add sam_linux_is_optee_available() function
Link: https://lore.kernel.org/r/20220721085852.1740924-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/arm/mach-at91/sam_secure.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-at91/sam_secure.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-at91/sama5.c | 16 |
3 files changed, 22 insertions, 1 deletions
diff --git a/arch/arm/mach-at91/sam_secure.c b/arch/arm/mach-at91/sam_secure.c index 2a01f7a7d13f..f7789cbe289f 100644 --- a/arch/arm/mach-at91/sam_secure.c +++ b/arch/arm/mach-at91/sam_secure.c @@ -27,6 +27,12 @@ struct arm_smccc_res sam_smccc_call(u32 fn, u32 arg0, u32 arg1) return res; } +bool sam_linux_is_optee_available(void) +{ + /* If optee has been detected, then we are running in normal world */ + return optee_available; +} + void __init sam_secure_init(void) { struct device_node *np; diff --git a/arch/arm/mach-at91/sam_secure.h b/arch/arm/mach-at91/sam_secure.h index 1e7d8b20ba1e..1a0b5ebbfc39 100644 --- a/arch/arm/mach-at91/sam_secure.h +++ b/arch/arm/mach-at91/sam_secure.h @@ -14,5 +14,6 @@ void __init sam_secure_init(void); struct arm_smccc_res sam_smccc_call(u32 fn, u32 arg0, u32 arg1); +bool sam_linux_is_optee_available(void); #endif /* SAM_SECURE_H */ diff --git a/arch/arm/mach-at91/sama5.c b/arch/arm/mach-at91/sama5.c index de5dd28b392e..67ed68fbe3a5 100644 --- a/arch/arm/mach-at91/sama5.c +++ b/arch/arm/mach-at91/sama5.c @@ -9,13 +9,27 @@ #include <linux/of.h> #include <linux/of_platform.h> +#include <asm/hardware/cache-l2x0.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> +#include <asm/outercache.h> #include <asm/system_misc.h> #include "generic.h" #include "sam_secure.h" +static void sama5_l2c310_write_sec(unsigned long val, unsigned reg) +{ + /* OP-TEE configures the L2 cache and does not allow modifying it yet */ +} + +static void __init sama5_secure_cache_init(void) +{ + sam_secure_init(); + if (sam_linux_is_optee_available()) + outer_cache.write_sec = sama5_l2c310_write_sec; +} + static void __init sama5_dt_device_init(void) { of_platform_default_populate(NULL, NULL, NULL); @@ -48,7 +62,6 @@ MACHINE_END static void __init sama5d2_init(void) { of_platform_default_populate(NULL, NULL, NULL); - sam_secure_init(); sama5d2_pm_init(); } @@ -60,6 +73,7 @@ static const char *const sama5d2_compat[] __initconst = { DT_MACHINE_START(sama5d2, "Atmel SAMA5") /* Maintainer: Atmel */ .init_machine = sama5d2_init, + .init_early = sama5_secure_cache_init, .dt_compat = sama5d2_compat, .l2c_aux_mask = ~0UL, MACHINE_END |