diff options
| author | Michael Hennerich | 2009-02-04 16:49:45 +0800 |
|---|---|---|
| committer | Bryan Wu | 2009-02-04 16:49:45 +0800 |
| commit | 772c258fd056a77fd808385a1c551dcd141cf8a3 (patch) | |
| tree | 85d838be65a27b8f830a2830ecfc0911615211ec | |
| parent | dfd700baf2ddab395cc059ce9f294306bf56a735 (diff) | |
Blackfin arch: Add BF561 PPI POLS, POLC Masks
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
| -rw-r--r-- | arch/blackfin/mach-bf561/include/mach/defBF561.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h index d7c509759659..cf922295f4ce 100644 --- a/arch/blackfin/mach-bf561/include/mach/defBF561.h +++ b/arch/blackfin/mach-bf561/include/mach/defBF561.h @@ -1106,6 +1106,8 @@ #define DLEN_8 0x0 /* PPI Data Length mask for DLEN=8 */ #define DLEN(x) (((x-9) & 0x07) << 11) /* PPI Data Length (only works for x=10-->x=16) */ #define POL 0x0000C000 /* PPI Signal Polarities */ +#define POLC 0x4000 /* PPI Clock Polarity */ +#define POLS 0x8000 /* PPI Frame Sync Polarity */ /* PPI_STATUS Masks */ #define FLD 0x00000400 /* Field Indicator */ |