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authorPalmer Dabbelt2022-04-21 10:03:55 -0700
committerPalmer Dabbelt2022-06-01 18:59:26 -0700
commit77d707a310fa908d796d00e6c26b650cf2b4442f (patch)
treeaea5d4142803655364666549dfe95a3db91c604a
parent2981deb83de2b94947086a992b961b2339988a71 (diff)
RISC-V: Only default to spinwait on SBI-0.1 and M-mode
The spinwait boot method has been superseded by the SBI HSM extension for some time now, but it still enabled by default. This causes some issues on large hart count systems, which will hang if a physical hart exists that is larger than NR_CPUS. Users on modern SBI implementation don't need spinwait, and while it's probably possible to deal with some of the spinwait issues let's just restrict the default to systems that are likely to actually use it. Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20220421170354.10555-1-palmer@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
-rw-r--r--arch/riscv/Kconfig8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 905e550e0fd3..c22f58155948 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -396,7 +396,7 @@ config RISCV_SBI_V01
config RISCV_BOOT_SPINWAIT
bool "Spinwait booting method"
depends on SMP
- default y
+ default y if RISCV_SBI_V01 || RISCV_M_MODE
help
This enables support for booting Linux via spinwait method. In the
spinwait method, all cores randomly jump to Linux. One of the cores
@@ -407,6 +407,12 @@ config RISCV_BOOT_SPINWAIT
rely on ordered booting via SBI HSM extension which gets chosen
dynamically at runtime if the firmware supports it.
+ Since spinwait is incompatible with sparse hart IDs, it requires
+ NR_CPUS be large enough to contain the physical hart ID of the first
+ hart to enter Linux.
+
+ If unsure what to do here, say N.
+
config KEXEC
bool "Kexec system call"
select KEXEC_CORE