diff options
author | Álvaro Fernández Rojas | 2020-06-17 12:50:37 +0200 |
---|---|---|
committer | Thomas Bogendoerfer | 2020-11-17 21:52:27 +0100 |
commit | 8079cfba4c7b8cae900c27104b4512fa5ed1f021 (patch) | |
tree | 310ef80eeda22f683706b4eca70c866c1d3d9303 | |
parent | 83f865d7e32e40b4903b1f83537c63fc5cdf1eb8 (diff) |
mips: bmips: dts: add BCM6358 reset controller support
BCM6358 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
-rw-r--r-- | arch/mips/boot/dts/brcm/bcm6358.dtsi | 6 | ||||
-rw-r--r-- | include/dt-bindings/reset/bcm6358-reset.h | 15 |
2 files changed, 21 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/brcm/bcm6358.dtsi b/arch/mips/boot/dts/brcm/bcm6358.dtsi index f21176cac038..9d93e7f5e6fc 100644 --- a/arch/mips/boot/dts/brcm/bcm6358.dtsi +++ b/arch/mips/boot/dts/brcm/bcm6358.dtsi @@ -82,6 +82,12 @@ interrupts = <2>, <3>; }; + periph_rst: reset-controller@fffe0034 { + compatible = "brcm,bcm6345-reset"; + reg = <0xfffe0034 0x4>; + #reset-cells = <1>; + }; + leds0: led-controller@fffe00d0 { #address-cells = <1>; #size-cells = <0>; diff --git a/include/dt-bindings/reset/bcm6358-reset.h b/include/dt-bindings/reset/bcm6358-reset.h new file mode 100644 index 000000000000..bda62ef84f5a --- /dev/null +++ b/include/dt-bindings/reset/bcm6358-reset.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __DT_BINDINGS_RESET_BCM6358_H +#define __DT_BINDINGS_RESET_BCM6358_H + +#define BCM6358_RST_SPI 0 +#define BCM6358_RST_ENET 2 +#define BCM6358_RST_MPI 3 +#define BCM6358_RST_EPHY 6 +#define BCM6358_RST_SAR 7 +#define BCM6358_RST_USBH 12 +#define BCM6358_RST_PCM 13 +#define BCM6358_RST_ADSL 14 + +#endif /* __DT_BINDINGS_RESET_BCM6358_H */ |