diff options
| author | Ben Skeggs | 2018-01-12 19:02:05 +1000 |
|---|---|---|
| committer | Ben Skeggs | 2018-02-02 15:24:07 +1000 |
| commit | 90df522912ac1fa88836fa1b1b9fa102a48d1f33 (patch) | |
| tree | ed99fa529f60191febe6312b00a566ee4226784a | |
| parent | e75182f68b7b3a073e33b89ee4c1688160755930 (diff) | |
drm/nouveau/kms/nv50: use INTERPOLATE_257_UNITY_RANGE LUT on newer chipsets
For some reason forgotten by history, we've been using a 1025-entry LUT
mode, and sparsely filling it with the 256-entry LUT we're handed.
Until we land support for the full atomic colour management properties,
this commit switches to using the 257-entry mode to fix colour mapping
with depth 30 framebuffers.
Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| -rw-r--r-- | drivers/gpu/drm/nouveau/nv50_display.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index f4daf8c55de1..973a41262139 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -1818,7 +1818,7 @@ nv50_head_lut_set(struct nv50_head *head, struct nv50_head_atom *asyh) evo_data(push, asyh->lut.handle); } else { evo_mthd(push, 0x0440 + (head->base.index * 0x300), 4); - evo_data(push, 0x83000000); + evo_data(push, 0x87000000); evo_data(push, asyh->lut.offset >> 8); evo_data(push, 0x00000000); evo_data(push, 0x00000000); @@ -2225,9 +2225,9 @@ nv50_head_lut_load(struct drm_crtc *crtc) writew((*b++ >> 2) + 0x0000, lut + (i * 0x08) + 4); } else { /* 0x6000 interferes with the 14-bit color??? */ - writew((*r++ >> 2) + 0x6000, lut + (i * 0x20) + 0); - writew((*g++ >> 2) + 0x6000, lut + (i * 0x20) + 2); - writew((*b++ >> 2) + 0x6000, lut + (i * 0x20) + 4); + writew((*r++ >> 2) + 0x6000, lut + (i * 0x08) + 0); + writew((*g++ >> 2) + 0x6000, lut + (i * 0x08) + 2); + writew((*b++ >> 2) + 0x6000, lut + (i * 0x08) + 4); } } } |