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authorArnd Bergmann2020-12-08 23:55:31 +0100
committerArnd Bergmann2020-12-08 23:55:32 +0100
commit96631a0d116528a1ab4b399bcd8b6b491394905c (patch)
treefcd92ddf28a0fae1e03641e1d5f2251fa321b4b6
parentff741319bc091cc133dca042dd86b5c35c4d6c00 (diff)
parentf74e93032df229a8358617e586ba89f744d5dbcd (diff)
Merge tag 'samsung-dt64-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.11 1. Several cleanups, including aligning node names with dtschema. 2. Add WiFi/PCIe to TM2 boards (Exynos5433). 3. Correct restart and shutdown of Exynos7 boards, as part of Paweł Chmiel Exynos7420 mainlining effort. * tag 'samsung-dt64-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: Drop incorrect use of io-channel-ranges property arm64: dts: exynos: use hyphens in Exynos5433 node names arm64: dts: exynos: Correct psci compatible used on Exynos7 arm64: dts: exynos: Include common syscon restart/poweroff for Exynos7 arm64: dts: exynos: add the WiFi/PCIe support to TM2(e) boards arm64: dts: exynos: remove redundant status=okay in Exynos5433 TM2 arm64: dts: exynos: adjust node names to DT spec in Exynos7 Espresso arm64: dts: exynos: adjust node names to DT spec in Exynos5433 TM2 arm64: dts: exynos: Harmonize DWC USB3 DT nodes name Link: https://lore.kernel.org/r/20201201204404.22675-3-krzk@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi10
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi2
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi39
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433.dtsi49
-rw-r--r--arch/arm64/boot/dts/exynos/exynos7-espresso.dts2
-rw-r--r--arch/arm64/boot/dts/exynos/exynos7.dtsi15
6 files changed, 84 insertions, 33 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
index d77b88af9582..8997f8f2b96c 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi
@@ -87,7 +87,7 @@
status = "disabled";
};
- bus_g2d_400_opp_table: opp_table2 {
+ bus_g2d_400_opp_table: opp-table2 {
compatible = "operating-points-v2";
opp-shared;
@@ -117,7 +117,7 @@
};
};
- bus_g2d_266_opp_table: opp_table3 {
+ bus_g2d_266_opp_table: opp-table3 {
compatible = "operating-points-v2";
opp-267000000 {
@@ -137,7 +137,7 @@
};
};
- bus_gscl_opp_table: opp_table4 {
+ bus_gscl_opp_table: opp-table4 {
compatible = "operating-points-v2";
opp-333000000 {
@@ -151,7 +151,7 @@
};
};
- bus_hevc_opp_table: opp_table5 {
+ bus_hevc_opp_table: opp-table5 {
compatible = "operating-points-v2";
opp-shared;
@@ -175,7 +175,7 @@
};
};
- bus_noc2_opp_table: opp_table6 {
+ bus_noc2_opp_table: opp-table6 {
compatible = "operating-points-v2";
opp-400000000 {
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
index 9df7c65593a1..32a6518517e5 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi
@@ -329,7 +329,7 @@
};
pcie_bus: pcie_bus {
- samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6", "gpr3-7";
+ samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
};
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
index 829fea23d4ab..03486a8ffc67 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
@@ -92,9 +92,8 @@
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
- status = "okay";
- max98504: max98504@31 {
+ max98504: amplifier@31 {
compatible = "maxim,max98504";
reg = <0x31>;
maxim,rx-path = <1>;
@@ -386,7 +385,7 @@
status = "okay";
clock-frequency = <2500000>;
- s2mps13-pmic@66 {
+ pmic@66 {
compatible = "samsung,s2mps13-pmic";
interrupt-parent = <&gpa0>;
interrupts = <7 IRQ_TYPE_NONE>;
@@ -817,7 +816,7 @@
status = "okay";
clock-frequency = <1000000>;
- sii8620@39 {
+ bridge@39 {
reg = <0x39>;
compatible = "sil,sii8620";
cvcc10-supply = <&ldo36_reg>;
@@ -852,7 +851,7 @@
&hsi2c_8 {
status = "okay";
- max77843@66 {
+ pmic@66 {
compatible = "maxim,max77843";
interrupt-parent = <&gpa1>;
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
@@ -861,7 +860,7 @@
muic: max77843-muic {
compatible = "maxim,max77843-muic";
- musb_con: musb_connector {
+ musb_con: musb-connector {
compatible = "samsung,usb-connector-11pin",
"usb-b-connector";
label = "micro-USB";
@@ -969,6 +968,25 @@
bus-width = <4>;
};
+&pcie {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_bus &pcie_wlanen>;
+ vdd10-supply = <&ldo6_reg>;
+ vdd18-supply = <&ldo7_reg>;
+ assigned-clocks = <&cmu_fsys CLK_MOUT_SCLK_PCIE_100_USER>,
+ <&cmu_top CLK_MOUT_SCLK_PCIE_100>;
+ assigned-clock-parents = <&cmu_top CLK_SCLK_PCIE_100_FSYS>,
+ <&cmu_top CLK_MOUT_BUS_PLL_USER>;
+ assigned-clock-rates = <0>, <100000000>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&pcie_phy {
+ status = "okay";
+};
+
&ppmu_d0_general {
status = "okay";
events {
@@ -1065,7 +1083,7 @@
PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
};
- te_irq: te_irq {
+ te_irq: te-irq {
samsung,pins = "gpf1-3";
samsung,pin-function = <0xf>;
};
@@ -1085,8 +1103,11 @@
pinctrl-names = "default";
pinctrl-0 = <&initial_ese>;
+ pcie_wlanen: pcie-wlanen {
+ PIN(INPUT, gpj2-0, UP, FAST_SR4);
+ };
+
initial_ese: initial-state {
- PIN(INPUT, gpj2-0, DOWN, FAST_SR1);
PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
};
@@ -1231,7 +1252,7 @@
cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
status = "okay";
- wm5110: wm5110-codec@0 {
+ wm5110: audio-codec@0 {
compatible = "wlf,wm5110";
reg = <0x0>;
spi-max-frequency = <20000000>;
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 8eb4576da8f3..6433f9ee35e1 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -23,7 +23,7 @@
interrupt-parent = <&gic>;
- arm_a53_pmu {
+ arm-a53-pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
@@ -32,7 +32,7 @@
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
- arm_a57_pmu {
+ arm-a57-pmu {
compatible = "arm,cortex-a57-pmu";
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
@@ -137,7 +137,7 @@
};
};
- cluster_a53_opp_table: opp_table0 {
+ cluster_a53_opp_table: opp-table0 {
compatible = "operating-points-v2";
opp-shared;
@@ -183,7 +183,7 @@
};
};
- cluster_a57_opp_table: opp_table1 {
+ cluster_a57_opp_table: opp-table1 {
compatible = "operating-points-v2";
opp-shared;
@@ -1029,6 +1029,11 @@
reg = <0x145f0000 0x1038>;
};
+ syscon_fsys: syscon@156f0000 {
+ compatible = "syscon";
+ reg = <0x156f0000 0x1044>;
+ };
+
gsc_0: video-scaler@13c00000 {
compatible = "samsung,exynos5433-gsc";
reg = <0x13c00000 0x1000>;
@@ -1445,7 +1450,6 @@
clock-names = "adc";
clocks = <&cmu_peric CLK_PCLK_ADCIF>;
#io-channel-cells = <1>;
- io-channel-ranges;
status = "disabled";
};
@@ -1647,7 +1651,7 @@
ranges;
status = "disabled";
- usbdrd_dwc3: dwc3@15400000 {
+ usbdrd_dwc3: usb@15400000 {
compatible = "snps,dwc3";
clocks = <&cmu_fsys CLK_SCLK_USBDRD30>,
<&cmu_fsys CLK_ACLK_USBDRD30>,
@@ -1700,7 +1704,7 @@
ranges;
status = "disabled";
- usbhost_dwc3: dwc3@15a00000 {
+ usbhost_dwc3: usb@15a00000 {
compatible = "snps,dwc3";
clocks = <&cmu_fsys CLK_SCLK_USBHOST30>,
<&cmu_fsys CLK_ACLK_USBHOST30>,
@@ -1830,6 +1834,37 @@
status = "disabled";
};
};
+
+ pcie_phy: pcie-phy@15680000 {
+ compatible = "samsung,exynos5433-pcie-phy";
+ reg = <0x15680000 0x1000>;
+ samsung,pmu-syscon = <&pmu_system_controller>;
+ samsung,fsys-sysreg = <&syscon_fsys>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ pcie: pcie@15700000 {
+ compatible = "samsung,exynos5433-pcie";
+ reg = <0x15700000 0x1000>, <0x156b0000 0x1000>,
+ <0x0c000000 0x1000>;
+ reg-names = "dbi", "elbi", "config";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu_fsys CLK_PCIE>,
+ <&cmu_fsys CLK_PCLK_PCIE_PHY>;
+ clock-names = "pcie", "pcie_bus";
+ num-lanes = <1>;
+ num-viewport = <3>;
+ bus-range = <0x00 0xff>;
+ phys = <&pcie_phy>;
+ ranges = <0x81000000 0 0 0x0c001000 0 0x00010000>,
+ <0x82000000 0 0x0c011000 0x0c011000 0 0x03feefff>;
+ status = "disabled";
+ };
};
timer: timer {
diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
index 92fecc539c6c..695d4c140646 100644
--- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
+++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
@@ -87,7 +87,7 @@
samsung,i2c-max-bus-freq = <200000>;
status = "okay";
- s2mps15_pmic@66 {
+ pmic@66 {
compatible = "samsung,s2mps15-pmic";
reg = <0x66>;
interrupts = <2 IRQ_TYPE_NONE>;
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index b9ed6a33e290..10244e59d56d 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -79,8 +79,10 @@
};
psci {
- compatible = "arm,psci-0.2";
+ compatible = "arm,psci";
method = "smc";
+ cpu_off = <0x84000002>;
+ cpu_on = <0xC4000003>;
};
soc: soc@0 {
@@ -481,13 +483,6 @@
pmu_system_controller: system-controller@105c0000 {
compatible = "samsung,exynos7-pmu", "syscon";
reg = <0x105c0000 0x5000>;
-
- reboot: syscon-reboot {
- compatible = "syscon-reboot";
- regmap = <&pmu_system_controller>;
- offset = <0x0400>;
- mask = <0x1>;
- };
};
rtc: rtc@10590000 {
@@ -567,7 +562,6 @@
clocks = <&clock_peric0 PCLK_ADCIF>;
clock-names = "adc";
#io-channel-cells = <1>;
- io-channel-ranges;
status = "disabled";
};
@@ -654,7 +648,7 @@
#size-cells = <1>;
ranges;
- dwc3@15400000 {
+ usb@15400000 {
compatible = "snps,dwc3";
reg = <0x15400000 0x10000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
@@ -687,3 +681,4 @@
};
#include "exynos7-pinctrl.dtsi"
+#include "arm/exynos-syscon-restart.dtsi"