diff options
| author | Alistair Popple | 2014-08-06 17:03:09 +1000 |
|---|---|---|
| committer | Benjamin Herrenschmidt | 2014-08-13 15:13:42 +1000 |
| commit | 97b3be1e9404f4c1645f3286428abd4d2052041e (patch) | |
| tree | 31e79eebdf8c4ec0cb539c7bcd6d75ee7f889034 | |
| parent | 763fe0addb8fe15ccea67c0aebddc06f4bb25439 (diff) | |
powerpc/ppc476: Disable BTAC
This patch disables the branch target address CAM which under specific
circumstances may cause the processor to skip execution of 1-4
instructions. This fixes IBM Erratum #47.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| -rw-r--r-- | arch/powerpc/kernel/head_44x.S | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S index c334f53453f7..b5061abbd2e0 100644 --- a/arch/powerpc/kernel/head_44x.S +++ b/arch/powerpc/kernel/head_44x.S @@ -1210,10 +1210,12 @@ clear_utlb_entry: /* We configure icbi to invalidate 128 bytes at a time since the * current 32-bit kernel code isn't too happy with icache != dcache - * block size + * block size. We also disable the BTAC as this can cause errors + * in some circumstances (see IBM Erratum 47). */ mfspr r3,SPRN_CCR0 oris r3,r3,0x0020 + ori r3,r3,0x0040 mtspr SPRN_CCR0,r3 isync |