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authorDave Airlie2013-11-10 09:24:24 +1000
committerDave Airlie2013-11-10 09:24:24 +1000
commit98706ea99f2da8afdac69686de4ff982aca6a5c7 (patch)
tree9f5dd4f60d20e59b1152d00702b52988b9da869f
parent91915260ea5ed9d9b19bfb75d53c989c8ada2ab0 (diff)
drm/nouveau: fix 32-bit build
This uses the proper div macro. Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c
index 1a016df4e0e8..250a6d96016b 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nv50.c
@@ -197,7 +197,7 @@ nv50_clock_read(struct nouveau_clock *clk, enum nv_clk_src src)
case nv_clk_src_href:
return 100000; /* PCIE reference clock */
case nv_clk_src_hclk:
- return (u64)clk->read(clk, nv_clk_src_href) * 27778 / 10000;
+ return div_u64((u64)clk->read(clk, nv_clk_src_href) * 27778, 10000);
case nv_clk_src_hclkm3:
return clk->read(clk, nv_clk_src_hclk) * 3;
case nv_clk_src_hclkm3d2: