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authorStefan Agner2020-12-07 18:58:03 +0100
committerKevin Hilman2020-12-07 11:12:50 -0800
commit9e454e37dc7c0ee9e108d70b983e7a71332aedff (patch)
tree6872ff13c62d8f1b150d0519f7c15f5f792eb99c
parent3d07c3b3a886fefd583c1b485b5e4e3c4e2da493 (diff)
arm64: dts: meson: g12b: w400: fix PHY deassert timing requirements
According to the datasheet (Rev. 1.9) the RTL8211F requires at least 72ms "for internal circuits settling time" before accessing the PHY egisters. On similar boards with the same PHY this fixes an issue where Ethernet link would not come up when using ip link set down/up. Fixes: 2cd2310fca4c ("arm64: dts: meson-g12b-ugoos-am6: add initial device-tree") Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/46298e66572784c44f873f1b71cc4ab3d8fc5aa6.1607363522.git.stefan@agner.ch
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
index 2802ddbb83ac..feb088504740 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
@@ -264,7 +264,7 @@
max-speed = <1000>;
reset-assert-us = <10000>;
- reset-deassert-us = <30000>;
+ reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
interrupt-parent = <&gpio_intc>;