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authorAlex Deucher2013-07-31 18:13:23 -0400
committerAlex Deucher2013-08-30 16:30:34 -0400
commit9e9d976205626c3bd92776181cde6a2dda648c2b (patch)
tree5cef72c347c2c3de5e2467f84a99f5982dd4498b
parent2b4c8022fa95de43f590629b3af611e531e7199a (diff)
drm/radeon/dpm: add new callback for powergating UVD (v4)
Starting on CIK, multi-media blocks like UVD no longer have special power state. Rather they have their own DPM implementation which adjusts their clocks dynamically when active. When they are not active, the blocks are powergated to save power. v2: add missing pm locks v3: rebase on uvd state selection rework v4: fix inverted logic typo noticed by Christian Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/radeon/radeon.h2
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c43
2 files changed, 27 insertions, 18 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 930650ec769c..5e21dbeaf314 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1730,6 +1730,7 @@ struct radeon_asic {
void (*debugfs_print_current_performance_level)(struct radeon_device *rdev, struct seq_file *m);
int (*force_performance_level)(struct radeon_device *rdev, enum radeon_dpm_forced_level level);
bool (*vblank_too_short)(struct radeon_device *rdev);
+ void (*powergate_uvd)(struct radeon_device *rdev, bool gate);
} dpm;
/* pageflipping */
struct {
@@ -2518,6 +2519,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_dpm_debugfs_print_current_performance_level(rdev, m) rdev->asic->dpm.debugfs_print_current_performance_level((rdev), (m))
#define radeon_dpm_force_performance_level(rdev, l) rdev->asic->dpm.force_performance_level((rdev), (l))
#define radeon_dpm_vblank_too_short(rdev) rdev->asic->dpm.vblank_too_short((rdev))
+#define radeon_dpm_powergate_uvd(rdev, g) rdev->asic->dpm.powergate_uvd((rdev), (g))
/* Common functions */
/* AGP */
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 66b04af16949..d7555369a3e5 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -886,28 +886,35 @@ void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable)
{
enum radeon_pm_state_type dpm_state;
- if (enable) {
+ if (rdev->asic->dpm.powergate_uvd) {
mutex_lock(&rdev->pm.mutex);
- rdev->pm.dpm.uvd_active = true;
- if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0))
- dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_SD;
- else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0))
- dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD;
- else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1))
- dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD;
- else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2))
- dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD2;
- else
- dpm_state = POWER_STATE_TYPE_INTERNAL_UVD;
- rdev->pm.dpm.state = dpm_state;
+ /* enable/disable UVD */
+ radeon_dpm_powergate_uvd(rdev, !enable);
mutex_unlock(&rdev->pm.mutex);
} else {
- mutex_lock(&rdev->pm.mutex);
- rdev->pm.dpm.uvd_active = false;
- mutex_unlock(&rdev->pm.mutex);
- }
+ if (enable) {
+ mutex_lock(&rdev->pm.mutex);
+ rdev->pm.dpm.uvd_active = true;
+ if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0))
+ dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_SD;
+ else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0))
+ dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD;
+ else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1))
+ dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD;
+ else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2))
+ dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD2;
+ else
+ dpm_state = POWER_STATE_TYPE_INTERNAL_UVD;
+ rdev->pm.dpm.state = dpm_state;
+ mutex_unlock(&rdev->pm.mutex);
+ } else {
+ mutex_lock(&rdev->pm.mutex);
+ rdev->pm.dpm.uvd_active = false;
+ mutex_unlock(&rdev->pm.mutex);
+ }
- radeon_pm_compute_clocks(rdev);
+ radeon_pm_compute_clocks(rdev);
+ }
}
static void radeon_pm_suspend_old(struct radeon_device *rdev)