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authorSascha Hauer2012-06-04 14:58:07 +0200
committerSascha Hauer2012-06-04 15:23:57 +0200
commitcdd781ab1906d039c2a93078385645d2d5af8491 (patch)
treed4663017b90fe846f6ec98d6472689b7572a8a8a
parent9ca41bccc39f5ebbbb515dfadb2e0f912168c8bd (diff)
ARM i.MX53: Fix PLL4 base address
MX53_DPLL4_BASE accidently returned the base address of PLL3. Fix this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Cc: stable@vger.kernel.org
-rw-r--r--arch/arm/mach-imx/crm-regs-imx5.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/crm-regs-imx5.h b/arch/arm/mach-imx/crm-regs-imx5.h
index 5e11ba7daee2..5e3f1f0f4cab 100644
--- a/arch/arm/mach-imx/crm-regs-imx5.h
+++ b/arch/arm/mach-imx/crm-regs-imx5.h
@@ -23,7 +23,7 @@
#define MX53_DPLL1_BASE MX53_IO_ADDRESS(MX53_PLL1_BASE_ADDR)
#define MX53_DPLL2_BASE MX53_IO_ADDRESS(MX53_PLL2_BASE_ADDR)
#define MX53_DPLL3_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
-#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
+#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL4_BASE_ADDR)
/* PLL Register Offsets */
#define MXC_PLL_DP_CTL 0x00