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authorEzequiel Garcia2013-02-06 10:06:21 -0300
committerArnd Bergmann2013-02-28 18:57:14 +0100
commitd5dc035eaa967cded8a295d4b07b7eb944c9044a (patch)
tree3fdc9244ced4404415f9346c43ec5f03d7ca0555
parent37dd39513c33d518ccd8ea39ebe43d0f117590da (diff)
arm: mvebu: Add support for SPI controller in Armada 370/XP
The Armada 370 and Armada XP SoC has an SPI controller. This patch adds support for this controller in Armada 370 and Armada XP SoC common device tree files. Note that the Armada XP SPI register length is 0x50 bytes, while Armada 370 SPI register length is 0x28 bytes, so we choose the smaller of the two. Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Lior Amsalem <alior@marvell.com> Acked-by: Gregory Clement <gregory.clement@free-electrons.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index cb434b2de628..6f1acc75e155 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -161,6 +161,27 @@
status = "disabled";
};
+ spi0: spi@d0010600 {
+ compatible = "marvell,orion-spi";
+ reg = <0xd0010600 0x28>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ interrupts = <30>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
+
+ spi1: spi@d0010680 {
+ compatible = "marvell,orion-spi";
+ reg = <0xd0010680 0x28>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ interrupts = <92>;
+ clocks = <&coreclk 0>;
+ status = "disabled";
+ };
};
};