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authorStafford Horne2017-01-10 23:30:23 +0900
committerStafford Horne2017-02-25 04:31:06 +0900
commite6d20c55a4d94eca419f80f996133f523ecedfe0 (patch)
tree4da9f421a8463946624b1aee5df2b9ff1bf5cc2c
parent2ead7aba44e973b313fde0e39371363459cc1128 (diff)
openrisc: entry: Fix delay slot detection
Use execption SR stored in pt_regs for detection, the current SR is not correct as the handler is running after return from exception. Also, The code that checks for a delay slot uses a flag bitmask and then wants to check if the result is not zero. The test it implemented was wrong. Correct it by changing the test to check result against non zero. Signed-off-by: Stafford Horne <shorne@gmail.com>
-rw-r--r--arch/openrisc/kernel/entry.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S
index daae2a423c3a..bc6500860f4d 100644
--- a/arch/openrisc/kernel/entry.S
+++ b/arch/openrisc/kernel/entry.S
@@ -258,9 +258,9 @@ EXCEPTION_ENTRY(_data_page_fault_handler)
#else
- l.mfspr r6,r0,SPR_SR // SR
+ l.lwz r6,PT_SR(r3) // SR
l.andi r6,r6,SPR_SR_DSX // check for delay slot exception
- l.sfeqi r6,0x1 // exception happened in delay slot
+ l.sfne r6,r0 // exception happened in delay slot
l.bnf 7f
l.lwz r6,PT_PC(r3) // address of an offending insn