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authorBoris Brezillon2018-11-20 11:57:18 +0100
committerMiquel Raynal2019-02-05 15:39:40 +0100
commitefe5d132cb5089ec049ea8d95be8e4f01d3d3e0d (patch)
treeaaf58c6ce6573584693edba64e6740c52e9aa83a
parenta0916c94e9143e8aa0a1fe2a64794041657e99ac (diff)
mtd: rawnand: omap2: Use nand_controller_init()
Stop initializing omap_gpmc_controller fields are declaration time and replace that by a call to nand_controller_init(). Since the same object might be shared by several NAND chips and the NAND controller driver expects a ->probe() per-chip, we need to keep track of the omap_gpmc_controller state (whether it's already been initialized or not). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-rw-r--r--drivers/mtd/nand/raw/omap2.c13
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/mtd/nand/raw/omap2.c b/drivers/mtd/nand/raw/omap2.c
index 68e8b9f7f372..eb6ec332624a 100644
--- a/drivers/mtd/nand/raw/omap2.c
+++ b/drivers/mtd/nand/raw/omap2.c
@@ -2173,11 +2173,8 @@ static const struct nand_controller_ops omap_nand_controller_ops = {
};
/* Shared among all NAND instances to synchronize access to the ECC Engine */
-static struct nand_controller omap_gpmc_controller = {
- .lock = __SPIN_LOCK_UNLOCKED(omap_gpmc_controller.lock),
- .wq = __WAIT_QUEUE_HEAD_INITIALIZER(omap_gpmc_controller.wq),
- .ops = &omap_nand_controller_ops,
-};
+static struct nand_controller omap_gpmc_controller;
+static bool omap_gpmc_controller_initialized;
static int omap_nand_probe(struct platform_device *pdev)
{
@@ -2227,6 +2224,12 @@ static int omap_nand_probe(struct platform_device *pdev)
info->phys_base = res->start;
+ if (!omap_gpmc_controller_initialized) {
+ omap_gpmc_controller.ops = &omap_nand_controller_ops;
+ nand_controller_init(&omap_gpmc_controller);
+ omap_gpmc_controller_initialized = true;
+ }
+
nand_chip->controller = &omap_gpmc_controller;
nand_chip->legacy.IO_ADDR_W = nand_chip->legacy.IO_ADDR_R;