diff options
author | David Daney | 2010-04-06 13:29:50 -0700 |
---|---|---|
committer | Ralf Baechle | 2010-04-12 17:26:22 +0100 |
commit | f6be75d03c8870be91e6e2a195648ece04b6bb16 (patch) | |
tree | eba85c44498f040ac07915d82467aa08bb426860 | |
parent | d8000beef2cd10c16dc5f66af715f692f5992652 (diff) |
MIPS: Calculate proper ebase value for 64-bit kernels
The ebase is relative to CKSEG0 not CAC_BASE. On a 32-bit kernel they
are the same thing, for a 64-bit kernel they are not.
It happens to kind of work on a 64-bit kernel as they both reference
the same physical memory. However since the CPU uses the CKSEG0 base,
determining if a J instruction will reach always gives the wrong result
unless we use the same number the CPU uses.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1093/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/kernel/traps.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 4e00f9bc23ee..1a4dd657ccb9 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1599,7 +1599,7 @@ void __init trap_init(void) ebase = (unsigned long) __alloc_bootmem(size, 1 << fls(size), 0); } else { - ebase = CAC_BASE; + ebase = CKSEG0; if (cpu_has_mips_r2) ebase += (read_c0_ebase() & 0x3ffff000); } |