diff options
| author | Baolin Wang | 2019-06-21 14:12:32 +0800 |
|---|---|---|
| committer | Ulf Hansson | 2019-07-10 13:17:30 +0200 |
| commit | f97ee8f5d9cdd03933517a6336836b8e4415e668 (patch) | |
| tree | e3ff467b3db221dc60ab9663afb6f14393f04d70 | |
| parent | eef9e0a60e78be6873b515e85466cac2f25581ed (diff) | |
dt-bindings: mmc: sprd: Add pinctrl support
When changing SD card voltage signal for Spreadtrum SD host controller,
it also need to switch related pin's state. Thus add pinctrl properties'
description in documentation.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/mmc/sdhci-sprd.txt | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt index e675397fa428..eb7eb1b529f0 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt @@ -19,6 +19,9 @@ Required properties: Optional properties: - assigned-clocks: the same with "sdio" clock - assigned-clock-parents: the default parent of "sdio" clock +- pinctrl-names: should be "default", "state_uhs" +- pinctrl-0: should contain default/high speed pin control +- pinctrl-1: should contain uhs mode pin control PHY DLL delays are used to delay the data valid window, and align the window to sampling clock. PHY DLL delays can be configured by following properties, @@ -50,6 +53,10 @@ sdio0: sdio@20600000 { assigned-clocks = <&ap_clk CLK_EMMC_2X>; assigned-clock-parents = <&rpll CLK_RPLL_390M>; + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&sd0_pins_default>; + pinctrl-1 = <&sd0_pins_uhs>; + sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>; bus-width = <8>; non-removable; |