diff options
author | Srinivas Kandagatla | 2020-08-11 11:34:52 +0100 |
---|---|---|
committer | Mark Brown | 2020-08-17 12:28:55 +0100 |
commit | ff69c97ef84c9f7795adb49e9f07c9adcdd0c288 (patch) | |
tree | 9e2d4d49769c932af4dabfa7722561aed4f52a56 | |
parent | 314213c15702f7598c486cf8c94f617719dfe339 (diff) |
ASoC: msm8916-wcd-analog: fix register Interrupt offset
For some reason interrupt set and clear register offsets are
not set correctly.
This patch corrects them!
Fixes: 585e881e5b9e ("ASoC: codecs: Add msm8916-wcd analog codec")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200811103452.20448-1-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | sound/soc/codecs/msm8916-wcd-analog.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sound/soc/codecs/msm8916-wcd-analog.c b/sound/soc/codecs/msm8916-wcd-analog.c index 4428c62e25cf..3ddd822240e3 100644 --- a/sound/soc/codecs/msm8916-wcd-analog.c +++ b/sound/soc/codecs/msm8916-wcd-analog.c @@ -19,8 +19,8 @@ #define CDC_D_REVISION1 (0xf000) #define CDC_D_PERPH_SUBTYPE (0xf005) -#define CDC_D_INT_EN_SET (0x015) -#define CDC_D_INT_EN_CLR (0x016) +#define CDC_D_INT_EN_SET (0xf015) +#define CDC_D_INT_EN_CLR (0xf016) #define MBHC_SWITCH_INT BIT(7) #define MBHC_MIC_ELECTRICAL_INS_REM_DET BIT(6) #define MBHC_BUTTON_PRESS_DET BIT(5) |