diff options
| author | Mayuresh Chitale | 2022-10-02 10:18:48 +0530 |
|---|---|---|
| committer | Anup Patel | 2022-10-02 10:18:48 +0530 |
| commit | 0bba48978f6b63aee0fa4ee3a8097ec94e75f7f2 (patch) | |
| tree | 54f18936f62aaff4d25e0a1710abea45b5fc1f41 | |
| parent | bad6ea07c876a67c4d8f46b0c565ab500150720f (diff) | |
RISC-V: KVM: Allow Guest use Zihintpause extension
We should advertise Zihintpause ISA extension to KVM user-space whenever
host supports it. This will allow KVM user-space (i.e. QEMU or KVMTOOL)
to pass on this information to Guest via ISA string.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
| -rw-r--r-- | arch/riscv/include/uapi/asm/kvm.h | 1 | ||||
| -rw-r--r-- | arch/riscv/kvm/vcpu.c | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h index b6770ee08872..9085b90cf324 100644 --- a/arch/riscv/include/uapi/asm/kvm.h +++ b/arch/riscv/include/uapi/asm/kvm.h @@ -99,6 +99,7 @@ enum KVM_RISCV_ISA_EXT_ID { KVM_RISCV_ISA_EXT_SVPBMT, KVM_RISCV_ISA_EXT_SSTC, KVM_RISCV_ISA_EXT_SVINVAL, + KVM_RISCV_ISA_EXT_ZIHINTPAUSE, KVM_RISCV_ISA_EXT_MAX, }; diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c index 901bb5c0cb50..0de0dd22e734 100644 --- a/arch/riscv/kvm/vcpu.c +++ b/arch/riscv/kvm/vcpu.c @@ -54,6 +54,7 @@ static const unsigned long kvm_isa_ext_arr[] = { RISCV_ISA_EXT_SVPBMT, RISCV_ISA_EXT_SSTC, RISCV_ISA_EXT_SVINVAL, + RISCV_ISA_EXT_ZIHINTPAUSE, }; static unsigned long kvm_riscv_vcpu_base2isa_ext(unsigned long base_ext) @@ -89,6 +90,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) case KVM_RISCV_ISA_EXT_M: case KVM_RISCV_ISA_EXT_SSTC: case KVM_RISCV_ISA_EXT_SVINVAL: + case KVM_RISCV_ISA_EXT_ZIHINTPAUSE: return false; default: break; |