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authorChris Zankel2008-01-15 09:49:18 -0800
committerChris Zankel2008-02-13 17:43:00 -0800
commit679262578ba975037901556b2ddc6b17a77cf671 (patch)
treed08a9961a73d822260f891ea74f79a1318dac1e1
parent44c64e6b15ceab6a4927f54e1081a74ba096b95a (diff)
[XTENSA] Exclude thread-global registers from the xtregs structures.
Signed-off-by: Chris Zankel <chris@zankel.net>
-rw-r--r--include/asm-xtensa/coprocessor.h21
1 files changed, 13 insertions, 8 deletions
diff --git a/include/asm-xtensa/coprocessor.h b/include/asm-xtensa/coprocessor.h
index e5849bb9f6cf..1cbcf9001a41 100644
--- a/include/asm-xtensa/coprocessor.h
+++ b/include/asm-xtensa/coprocessor.h
@@ -31,7 +31,7 @@
#define _SELECT ( XTHAL_SAS_TIE | XTHAL_SAS_OPT \
| XTHAL_SAS_CC \
- | XTHAL_SAS_CALR | XTHAL_SAS_CALE | XTHAL_SAS_GLOB )
+ | XTHAL_SAS_CALR | XTHAL_SAS_CALE )
.macro save_xtregs_opt ptr clb at1 at2 at3 at4 offset
.if XTREGS_OPT_SIZE > 0
@@ -112,17 +112,22 @@
* CPENABLE bit is set.
*/
-#define XCHAL_SA_REG(list,compiler,x,type,y,name,z,align,size,...) \
- __REG ## list (compiler, type, name, size, align)
+#define XCHAL_SA_REG(list,cc,abi,type,y,name,z,align,size,...) \
+ __REG ## list (cc, abi, type, name, size, align)
+
+#define __REG0(cc,abi,t,name,s,a) __REG0_ ## cc (abi,name)
+#define __REG1(cc,abi,t,name,s,a) __REG1_ ## cc (name)
+#define __REG2(cc,abi,type,...) __REG2_ ## type (__VA_ARGS__)
-#define __REG0(compiler,t,name,s,a) __REG0_ ## compiler (name)
-#define __REG1(compiler,t,name,s,a) __REG1_ ## compiler (name)
-#define __REG2(c,type,...) __REG2_ ## type (__VA_ARGS__)
+#define __REG0_0(abi,name)
+#define __REG0_1(abi,name) __REG0_1 ## abi (name)
+#define __REG0_10(name) __u32 name;
+#define __REG0_11(name) __u32 name;
+#define __REG0_12(name)
-#define __REG0_0(name)
-#define __REG0_1(name) __u32 name;
#define __REG1_0(name) __u32 name;
#define __REG1_1(name)
+
#define __REG2_0(n,s,a) __u32 name;
#define __REG2_1(n,s,a) unsigned char n[s] __attribute__ ((aligned(a)));
#define __REG2_2(n,s,a) unsigned char n[s] __attribute__ ((aligned(a)));