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authorPierre-Louis Bossart2020-05-19 04:35:50 +0800
committerVinod Koul2020-05-20 17:22:36 +0530
commitc5778ca49a19420c67dbeff0744a3b3b75ef4e1a (patch)
tree2ebe09043b3f5f8ba75ea4364f03c6d6bf6e12f2 /Documentation/ABI/testing/sysfs-bus-soundwire-master
parent6bf393c577c4a6e324ab103425fbf71126e5385b (diff)
soundwire: master: add sysfs support
Add the master properties as attributes. The description is directly derived from the MIPI DisCo specification. Credits: this patch is based on an earlier internal contribution by Vinod Koul, Sanyog Kale, Shreyas Nc and Hardik Shah. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20200518203551.2053-3-yung-chuan.liao@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'Documentation/ABI/testing/sysfs-bus-soundwire-master')
-rw-r--r--Documentation/ABI/testing/sysfs-bus-soundwire-master23
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diff --git a/Documentation/ABI/testing/sysfs-bus-soundwire-master b/Documentation/ABI/testing/sysfs-bus-soundwire-master
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index 000000000000..46ef038d8722
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+++ b/Documentation/ABI/testing/sysfs-bus-soundwire-master
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+What: /sys/bus/soundwire/devices/sdw-master-N/revision
+ /sys/bus/soundwire/devices/sdw-master-N/clk_stop_modes
+ /sys/bus/soundwire/devices/sdw-master-N/clk_freq
+ /sys/bus/soundwire/devices/sdw-master-N/clk_gears
+ /sys/bus/soundwire/devices/sdw-master-N/default_col
+ /sys/bus/soundwire/devices/sdw-master-N/default_frame_rate
+ /sys/bus/soundwire/devices/sdw-master-N/default_row
+ /sys/bus/soundwire/devices/sdw-master-N/dynamic_shape
+ /sys/bus/soundwire/devices/sdw-master-N/err_threshold
+ /sys/bus/soundwire/devices/sdw-master-N/max_clk_freq
+
+Date: April 2020
+
+Contact: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
+ Bard Liao <yung-chuan.liao@linux.intel.com>
+ Vinod Koul <vkoul@kernel.org>
+
+Description: SoundWire Master-N DisCo properties.
+ These properties are defined by MIPI DisCo Specification
+ for SoundWire. They define various properties of the Master
+ and are used by the bus to configure the Master. clk_stop_modes
+ is a bitmask for simplifications and combines the
+ clock-stop-mode0 and clock-stop-mode1 properties.