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authorJonathan Cameron2020-09-30 22:05:46 +0800
committerRafael J. Wysocki2020-10-02 18:51:57 +0200
commitb9fffe47212c70114f1d91e773ce5ecff8936ef5 (patch)
tree7fd117f76bb3343792305dc7a772f70ee6c71b07 /Documentation/admin-guide
parent2c5b9bde95c96942f2873cea6ef383c02800e4a8 (diff)
node: Add access1 class to represent CPU to memory characteristics
New access1 class is nearly the same as access0, but always provides characteristics for CPUs to memory. The existing access0 class provides characteristics to nearest or direct connnect initiator which may be a Generic Initiator such as a GPU or network adapter. This new class allows thread placement on CPUs to be performed so as to give optimal access characteristics to memory, even if that memory is for example attached to a GPU or similar and only accessible to the CPU via an appropriate bus. Suggested-by: Dan Willaims <dan.j.williams@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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