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authorChristoph Hellwig2022-01-03 19:35:54 +0100
committerAlexei Starovoitov2022-01-05 13:11:26 -0800
commit03c517ee9eedd95472c36c6291fc97368b48c9e4 (patch)
tree93c97219d42e9eebdb404997b126fad27249fba0 /Documentation/bpf
parent894cda554c3c3dc836f3cc873c47a465ba9433b4 (diff)
bpf, docs: Fully document the ALU opcodes
Add pseudo-code to document all the different BPF_ALU / BPF_ALU64 opcodes. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Link: https://lore.kernel.org/bpf/20220103183556.41040-5-hch@lst.de
Diffstat (limited to 'Documentation/bpf')
-rw-r--r--Documentation/bpf/instruction-set.rst30
1 files changed, 15 insertions, 15 deletions
diff --git a/Documentation/bpf/instruction-set.rst b/Documentation/bpf/instruction-set.rst
index 2987cbb07f7f..efba4d193185 100644
--- a/Documentation/bpf/instruction-set.rst
+++ b/Documentation/bpf/instruction-set.rst
@@ -82,24 +82,24 @@ BPF_ALU uses 32-bit wide operands while BPF_ALU64 uses 64-bit wide operands for
otherwise identical operations.
The code field encodes the operation as below:
- ======== ===== =========================
+ ======== ===== ==========================
code value description
- ======== ===== =========================
- BPF_ADD 0x00
- BPF_SUB 0x10
- BPF_MUL 0x20
- BPF_DIV 0x30
- BPF_OR 0x40
- BPF_AND 0x50
- BPF_LSH 0x60
- BPF_RSH 0x70
- BPF_NEG 0x80
- BPF_MOD 0x90
- BPF_XOR 0xa0
- BPF_MOV 0xb0 mov reg to reg
+ ======== ===== ==========================
+ BPF_ADD 0x00 dst += src
+ BPF_SUB 0x10 dst -= src
+ BPF_MUL 0x20 dst \*= src
+ BPF_DIV 0x30 dst /= src
+ BPF_OR 0x40 dst \|= src
+ BPF_AND 0x50 dst &= src
+ BPF_LSH 0x60 dst <<= src
+ BPF_RSH 0x70 dst >>= src
+ BPF_NEG 0x80 dst = ~src
+ BPF_MOD 0x90 dst %= src
+ BPF_XOR 0xa0 dst ^= src
+ BPF_MOV 0xb0 dst = src
BPF_ARSH 0xc0 sign extending shift right
BPF_END 0xd0 endianness conversion
- ======== ===== =========================
+ ======== ===== ==========================
BPF_ADD | BPF_X | BPF_ALU means::