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author | Hebbar, Gururaja | 2012-11-19 21:59:58 +0530 |
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committer | Chris Ball | 2012-12-06 13:54:56 -0500 |
commit | cd587096c0e2b85a67e77721a753679bac89b394 (patch) | |
tree | 22ae2292f85cb8d36530535bc087bacdb8889158 /Documentation/bus-virt-phys-mapping.txt | |
parent | dc7745bd32272a614a6598c05db4510548ef18f2 (diff) |
mmc: omap_hsmmc: Enable HSPE bit for high speed cards
HSMMC IP on AM33xx need a special setting to handle High-speed cards.
Other platforms like TI81xx, OMAP4 may need this as-well. This depends
on the HSMMC IP timing closure done for the high speed cards.
From AM335x TRM (SPRUH73F - 18.3.12 Output Signals Generation):
The MMC/SD/SDIO output signals can be driven on either falling edge or
rising edge depending on the SD_HCTL[2] HSPE bit. This feature allows
to reach better timing performance, and thus to increase data transfer
frequency.
There are few pre-requisites for enabling the HSPE bit
- Controller should support High-Speed-Enable Bit and
- Controller should not be using DDR Mode and
- Controller should advertise that it supports High Speed in
capabilities register and
- MMC/SD clock coming out of controller > 25MHz
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Venkatraman S <svenkatr@ti.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'Documentation/bus-virt-phys-mapping.txt')
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