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authorAlexandru Ardelean2020-04-10 23:40:37 +0800
committerLey Foon Tan2020-04-11 01:45:52 +0800
commit6dd5d3b8ad2b5a30509c76f164a61b32351aafdd (patch)
treea9da23b32714dbcab7a29d4e11b54a565c4cb6ac /Documentation/devicetree/bindings/fpga/fpga-region.txt
parentf26e433185cb2830b933df3a4d378558fe2fccd9 (diff)
arch: nios2: rename 'altr,gpio-bank-width' -> 'altr,ngpio'
There is no more 'altr,gpio-bank-width' in the 'altr,pio-1.0' driver. There is a 'altr,ngpio' which is what the property wants to configure. This change updates all occurrences of 'altr,gpio-bank-width' to 'altr,ngpio'. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'Documentation/devicetree/bindings/fpga/fpga-region.txt')
-rw-r--r--Documentation/devicetree/bindings/fpga/fpga-region.txt4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt
index 90c44694a30b..b0dacb6a3390 100644
--- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
+++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
@@ -263,7 +263,7 @@ Overlay contains:
gpio@10040 {
compatible = "altr,pio-1.0";
reg = <0x10040 0x20>;
- altr,gpio-bank-width = <4>;
+ altr,ngpio = <4>;
#gpio-cells = <2>;
clocks = <2>;
gpio-controller;
@@ -468,7 +468,7 @@ programming is the FPGA based bridge of fpga_region1.
compatible = "altr,pio-1.0";
reg = <0x10040 0x20>;
clocks = <0x2>;
- altr,gpio-bank-width = <0x4>;
+ altr,ngpio = <0x4>;
resetvalue = <0x0>;
#gpio-cells = <0x2>;
gpio-controller;