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authorMatthew Gerlach2017-03-23 19:34:29 -0500
committerGreg Kroah-Hartman2017-04-08 17:45:28 +0200
commit6e761cd77b5c88ce2817d34088b7762aa40e1fd6 (patch)
tree391e8ee880e6b99f00f70cefced07fe810453bdb /Documentation/devicetree/bindings/fpga
parentd201cc17a8a31cc6c4f3944988fe9e2f04b021fb (diff)
fpga dt: bindings for Altera Partial Reconfiguration IP.
Device Tree bindings for Altera Partial Reconfiguration IP. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Alan Tull <atull@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/fpga')
-rw-r--r--Documentation/devicetree/bindings/fpga/altera-pr-ip.txt12
1 files changed, 12 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
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index 000000000000..52a294cf2730
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
@@ -0,0 +1,12 @@
+Altera Arria10 Partial Reconfiguration IP
+
+Required properties:
+- compatible : should contain "altr,a10-pr-ip"
+- reg : base address and size for memory mapped io.
+
+Example:
+
+ fpga_mgr: fpga-mgr@ff20c000 {
+ compatible = "altr,a10-pr-ip";
+ reg = <0xff20c000 0x10>;
+ };