diff options
| author | Rafał Miłecki | 2021-10-08 22:59:36 +0200 |
|---|---|---|
| committer | Linus Walleij | 2021-10-14 01:09:06 +0200 |
| commit | 0398adaec3419bdfa93baae70a3b696b4abdd7ad (patch) | |
| tree | 3cba0e822cf3a31c7a34145ced7cf9b8467b2c66 /Documentation/devicetree/bindings/pinctrl | |
| parent | 64570fbc14f8d7cb3fe3995f20e26bc25ce4b2cc (diff) | |
Revert "dt-bindings: pinctrl: bcm4708-pinmux: rework binding to use syscon"
This reverts commit 2ae80900f239484069569380e1fc4340fd6e0089.
My rework was unneeded & wrong. It replaced a clear & correct "reg"
property usage with a custom "offset" one.
Back then I didn't understand how to properly handle CRU block binding.
I heard / read about syscon and tried to use it in a totally invalid
way. That change also missed Rob's review (obviously).
Northstar's pin controller is a simple consistent hardware block that
can be cleanly mapped using a 0x24 long reg space.
Since the rework commit there wasn't any follow up modifying in-kernel
DTS files to use the new binding. Broadcom also isn't known to use that
bugged binding. There is close to zero chance this revert may actually
cause problems / regressions.
This commit is a simple revert. Example binding may (should) be updated
/ cleaned up but that can be handled separately.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211008205938.29925-1-zajec5@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl')
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml | 23 |
1 files changed, 13 insertions, 10 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml index 470aff599c27..78600a8fe403 100644 --- a/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml +++ b/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml @@ -17,9 +17,6 @@ description: A list of pins varies across chipsets so few bindings are available. - Node of the pinmux must be nested in the CRU (Central Resource Unit) "syscon" - node. - properties: compatible: enum: @@ -27,10 +24,11 @@ properties: - brcm,bcm4709-pinmux - brcm,bcm53012-pinmux - offset: - description: offset of pin registers in the CRU block + reg: maxItems: 1 - $ref: /schemas/types.yaml#/definitions/uint32-array + + reg-names: + const: cru_gpio_control patternProperties: '-pins$': @@ -72,19 +70,24 @@ allOf: uart1_grp ] required: - - offset + - reg + - reg-names additionalProperties: false examples: - | cru@1800c100 { - compatible = "syscon", "simple-mfd"; + compatible = "simple-bus"; reg = <0x1800c100 0x1a4>; + ranges; + #address-cells = <1>; + #size-cells = <1>; - pinctrl { + pin-controller@1c0 { compatible = "brcm,bcm4708-pinmux"; - offset = <0xc0>; + reg = <0x1c0 0x24>; + reg-names = "cru_gpio_control"; spi-pins { function = "spi"; |